2Institute of Electronic and Information Engineering, UESTC, Dongguan,
Guangdong, P.R. China.
✉ Email: zhouqi@uestc.edu.cn
In this letter, the underlying physics of threshold voltage
(Vth) instability and the eventual device failure
mechanism of 100V Schottky p-GaN gate high electron mobility transistors
(HEMTs) under repetitive short-circuit (SC) stress with varied drain
voltage (VDD= 40-70V) and SC pulse duration
(TSC=10 μs & 20 μs) is studied. In the lenient
SC stress with lower SC energy (e.g. SC stress @VGS=6 V, VDD=40-70 V,TSC=10 μs), the devices exhibit significantly
positive Vth shift while theVth instability shows positive dependence with
the stressed drain voltage and the repetitive SC pulses. For device
stressed at VDD=70 V with 150 SC pulses, a
substantial ΔVth as high as +0.68 V is observed.
Such a prominent Vth instability is induced by
the electron trapping in the p-GaN gate region during the SC events,
which also results in the suppressed gate and drain leakage current
after SC stress. In the more stringent SC stress
(VGS=6 V, VDD=70 V,TSC=20 μs) with much higher corresponding SC
energy, the device failed due to the drain electrode burned out
initiated by the significantly high SC energy during the SC events.
Introduction: In recent years, owing to its superior power
performance, the p-GaN gate HEMTs have been commercialized and used in
fast charger, LiDAR, and data-center etc . However, the device
stability is still a challenge and the underlying physics responsible
for the device instability as well as the device failure mechanism are
of great interests for further improvement of the device stability to
deliver stable and high-power performance of GaN power electronics. In
the high frequency power applications, such as PFC converter and LLC
resonant circuit, short circuit (SC) robustness is important for the
stable and safe operation of power circuits. The SC fault may occur due
to the failure or short in the load, faulty gate control signals,
crosstalk in a phase-leg circuit [1], [2] etc . During the
SC events, the device simultaneously undergoes a high bus voltage and
large SC current, such a harsh condition may result in significant
device degeneration or even destructive failure, which is one of the
biggest impediments for the safe and efficient operation of GaN power
conversion systems. Hence, investigating the device instability and
failure mechanism is of great importance to improve the SC stability of
p-GaN gate HEMTs.
Recently, the SC characteristics of 600V/650V high voltage p-GaN gate
HEMTs under different SC conditions have been investigated
[3]-[6]. The high voltage HEMTs exhibit weak repetitive SC
capability since the high SC energy generates significant heat during
the SC events which leads to prominent mechanical stress and then
results in fatigue or fracture failure [4]. However, the SC
characteristics and device instability of 100 V low-voltage p-GaN gate
HEMTs are rarely reported [7]. Particularly, the ultimate device
failure mechanism under SC events is still lacking up to date.
In this work, by conducting the repetitive SC stress with up to 150
pulse cycles and varied stress V DD andT SC, the V th instability
during the evolution of the SC stress is recorded and the underlying
mechanism is studied. By further enhancing the stress condition with
higher SC energy, the eventual device failure is observed and the
failure mechanism is revealed by studying the SC waveform and chip
microscopy. The experimental results show that the studied 100 V p-GaN
gate HEMTs feature quite different SC characteristics from the reported
600/650 V p-GaN gate HEMTs [3]-[6].