Figure 6. The systematic simulation results for the hardware softplus neuron and filtering unit utilization in the neural network. a) Evolution of the testing accuracy with training epoch between software softplus neuron and hardware softplus neuron applied in the multilayer perceptron (MLP), and main parameters of this MLP are shown in the inset. b) The neural network performances of different cutoff voltages of the hardware softplus neuron. c) The summary of the final testing accuracy for the cutoff voltage, the inset shows the operated region under the constraint of cutoff voltage. d) Endurance testing of the ion-modulated memtransistor as hardware softplus neuron, the peak current and the resting current during pulse stimuli (3 V,40 ms) were recorded for 2000 cycles. The drain current change under the single gate pulse was shown in the inset. e) The investigation of the testing accuracies concerning the different-level noises on the hardware softplus neuron and the hardware softplus neuron function with Gaussian noise of standard deviation of 1.0 is depicted in the inset. f) The comparison among randomly selected images at the original state after adding 10% Gaussian noise and after filtering by the nonlinearity of the device. g) The testing accuracies evolution for the original images, noisy images and filtered images. h) The confusion matrix for the Fashion-Mnist classification results for the images with 10% Gaussian noise and after filtering the noises, respectively. i) Final recognition accuracies for different mapping strategies of different starting operation voltages applied at the gate, comparing among the original images, noisy images and filtered images. j) One of the testing images with different levels of Gaussian noises (std=10%, 20%, 30%). k) Testing accuracies among the original images, noisy images and filtered images regarding the standard deviations ranging from 2.5% to 30%.