Device-Circuit Performance Analysis of a High-VT Recessed-p-Gate HEMT
Employing Doped-Buried Layer
Abstract
Nowadays, one of the appealing choice of transistors for the next
generation of high power devices is, AlGaN/GaN high-electron-mobility
transistor (AlGaN/GaN-HEMT). Prior to now, numerous experiments were
conducted utilizing various gate engineering techniques to propose high
threshold voltage enhancement-mode HEMT architectures. In this paper,
two new e-mode HEMT structures are proposed by taking motivation from
our previously reported structure of Recessed p-GaN gate HEMT. By
incorporating p-doped buried layer with recessed p-GaN gate in one HEMT
structure, the threshold voltage is significantly increased. In first
experiment, a p-doped GaN region is buried in to the Gallium Nitride
(GaN) substrate of conventional p-GaN gate HEMT. In second experiment, a
p-GaN buried layer is inserted in to GaN substrate of recessed p-GaN
gate HEMT. V th of above 3V is obtained from the
proposed structures, which is suitable to be implemented for
high-frequency power switching applications. The proposed structures
provides flexibility to tune V th and I
d. The digital circuit compatibility is also tested by
using both the proposed structures in a resistive-load inverter circuit.
The transient analysis confirms that the HEMTs work properly in inverter
circuit and the VTC analysis shows 98.5% of output voltage swing at
input voltage of 5V. Highest NM H and NM
L is measured as 2.85V and 2.65V respectively. The
device simulation, calibration and circuit simulation is done in Silvaco
TCAD software.