Design and Performance Analysis of a Single-Source Cascaded H-Bridge
Multilevel Inverter with Switched Rectifier
Abstract
Although MLIs provide better performance than traditional two-level
inverters due to reduced harmonic distortion, reduced electromagnetic
interference, and increased AC output voltage with lower voltages, they
have a shortcoming such as increased number of sources. This paper
proposes a new topology combination using High Frequency Link (HFL) with
Switched Rectifier (SR) that compensates for the mentioned shortcoming.
Thanks to this diversity, Cascaded H-Bridge (CHB) MLI, which produces 27
levels with 16 switches, is configured with SR and the output level is
increased to 33. The proposed topology, which can produce outputs with
varying frequency and amplitude, is confirmed using the Genesys-2 FPGA
development board in both simulation and experimentation. The Nearest
Level Control method, which targets low switching frequency, is used to
minimize energy losses and reduce total harmonic distortion. Total
standing voltage (TSV), cost factor per level, and efficiency
calculations are performed in order to assess the proposed inverter’s
economic feasibility. These results are then compared with those of many
studies that use HFL in terms of component count, TSV, cost factor and
it is noted that the results are like counterpart MLI topologies.
Although TSV and cost factor per level are similar, the increase from 27
levels to 33 levels with 1 switch is seen as a significant increase.