Abstract
Variable supply voltage-clustered voltage scaling (VS-CVS) is an
effective way to decrease power consumption without compromising
performance. One of the major challenges in VS-CVS design is that level
converting flip-flops(LCFFs) not only need to have low power consumption
but also high performance. In this paper, we propose two new structures
of LCFF: the data branch sharing LCFF based on conditional charging
(DBS-LCFFCC) and the data branch sharing LCFF based on precharging
(DBS-LCFFP).The new structures adopt a data branch sharing scheme to
improve the speed of the circuit as well as to reduce the number of
transistors. Based on simulation results using HSPICE with PTM 32nm CMOS
technology, the proposed LCFFs show an improvement of 19.2% to 67.2%
and 41.6% to 76.3% in power-delay-product (PDP) at 50% data switching
activity, respectively, compared to other advanced LCFFs.
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