This paper presents a shadow signal generator that produces square and triangular waveforms. The oscillator frequency can be changed using an external circuit (shadow oscillator). This method will make the conversion speed better than the conventional oscillators. The technique is based on utilizing an external circuit to modify the comparator’s tripping point. The circuit is built using widely available commercial integrated circuits, 1% accurate resistors, and DC supplies with a ±5V voltage. The recommended setup is suitable for instrumentation where the oscillation frequency is directly proportional to the variation in the resistance of the sensor. The functionality of the proposed design was confirmed by experimentation and simulation. The oscillation’s frequency can be changed to be nearly 10 times greater than its starting value, according to the results.

It is well known that CMOS Cross-coupled Differential Drive (CCDD) is the commonly used approach in the design of RF-DC converters. However, multistage designs are usually used to produce higher DC output voltage. This in turn will lead to using the twin-well CMOS process for fabrication since the NMOS source will be at higher potential in the next and consequent stages. The twin-well process technology is expensive compared to the n-well process. On the other hand, the DC output of these designs will saturate when higher voltage is required using multistage. This brief presents a new CMOS n-well process RF-DC converter. The design is hybrid in which the first stage is designed using CCDD since the NMOS source is grounded and the second and consequent stages are designed using only PMOS transistors. The functionality of the proposed design is confirmed using CADENCE in 0.18µm TSMC CMOS technology. Simulation results show that the design is working properly and achieves linear DC output voltage with the number of stages and an input power range of 33dB for PCE >20%.

This paper presents a novel CMOS tunable positive and negative active inductor simulator (AIs), positive capacitance and resistance multiplier and negative capacitance and resistance simulator. The proposed design use only one second-generation voltage-mode conveyor (VCII) and three passive elements. Applications to the proposed design in the design of different types of tunable filters are also presented. The functionality of the designs is confirmed using Tanner Tspice in 0.18µm TSMC CMOS technology.

This paper presents a compact CMOS tunable positive and negative active inductor simulator (AIs), positive capacitance and resistance multiplier and negative capacitance and resistance simulator. The proposed design use only one analog building block (ABB) and three passive elements. Applications in the design of different types of tunable filters and parasitic compensation are also presented. The functionality of the design is confirmed using Tanner Tspice in 0.18µm TSMC CMOS technology. Simulation results indicate that the proposed design is superior to previous arts in many aspects.