It is well-known that attainable DC link voltage loop bandwidth in grid-connected converters operating with unity power factor is limited due to trade-off with AC-side current total harmonic distortion (THD). The letter reveals that THD requirement directly imposes the value of voltage loop gain magnitude at double-grid frequency; therefore the dynamic performance may be improved without deteriorating the grid-side current quality by modifying the controller structure such that the loop gain magnitude at double-grid frequency and the crossover frequency are decoupled. Experimental results validate the revealed findings.

The paper reveals analytical expressions linking the coefficients of PI controller, typically employed as voltage loop compensator of power factor correction rectifiers (PFCR), with two major performance merits (namely, total harmonic distortion (THD) of grid-side current and DC-link voltage deviation upon sudden load increase) and DC link capacitance to rated power ratio. The proposed methodology allows to concretize the commonly used “8–10Hz crossover frequency, 45 degree–70 degree phase margin” rule-of-thumb, typically utilized in application notes of commercial PFC controllers. Relations between voltage loop gain crossover frequency and phase margin as well as settling time of DC-link voltage response to a step load increase to the above mentioned performance merits are also derived in the paper. Provided design guidelines allow to precisely achieve desired values of the two mentioned performance merits and indicate the feasible range of possible DC link capacitance values. Proposed quantitative design guidelines are well-supported by experiments.