The feasibility study of deep learning (DL) approaches for reliable, flexible, and high throughput wireless physical layer (PHY) has received significant interest from academia and industry. Channel estimation (CE) is one of the critical signal processing units of the receiver PHY. Recent DLbased CE approaches have outperformed state-of-the-art statistical approaches such as least-square-based CE (LS) and linear minimum mean square error-based CE (LMMSE), requiring hardware-friendly arithmetic computations than LMMSE. The first contribution is optimizing the existing state-of-the-art CE algorithms for realization on system-on-chip (SoC) via hardwaresoftware co-design and fixed point analysis, followed by performance comparison for various signal-to-noise ratios (SNR) and wireless channels. We highlight the high complexity, execution time, and power consumption of existing DL-based CE and LMMSE approaches, along with the poor performance of the LS. We develop a novel compute-efficient LS-augmented interpolated deep neural network (LSiDNN) based CE algorithm and realize it on SoC. We demonstrate substantial savings in complexity and execution time without significant degradation in functional accuracy. Specifically, the proposed LSiDNN approach offers 88-90% lower execution time and 38-85% lower resources than state-of-the-art DL-based CE. LSiDNN significantly outperforms LMMSE, and the gain improves with increased mobility. It also offers 75% lower execution time and 90-94% lower resource utilization than LMMSE

Reliable and fast channel estimation is crucial for next-generation wireless networks supporting a wide range of vehicular and low-latency services. Recently, deep learning (DL) based channel estimation has been explored as an efficient alternative to conventional least-square (LS) and linear minimum mean square error (LMMSE) approaches. Most of these DL approaches have not been realized on system-on-chip (SoC), and preliminary study shows that their complexity exceeds the complexity of the entire physical layer (PHY). The high latency of DL is another concern. This paper considers the design and implementation of deep neural network (DNN) augmented LS-based channel estimation (LSDNN) for { \color{black} preamble-based orthogonal frequency-division multiplexing (OFDM) physical layer (PHY)} on SoC. We demonstrate the gain in performance compared to the conventional LS and LMMSE approaches. Via software-hardware co-design, word-length optimization, and reconfigurable architectures, we demonstrate the superiority of the LSDNN over the LS and LMMSE for a wide range of signal-to-noise ratio (SNR), number of pilots, preamble types, and wireless channels. Further, we evaluate the performance, power, and area (PPA) of the LS and LSDNN application-specific integrated circuit (ASIC) implementations in 45 nm technology. We demonstrate that word-length optimization can substantially improve PPA for the proposed architecture in ASIC implementations.