Hardware obfuscation is a design transformation technique that transforms a design to protect its confidentiality against untrusted parties. In particular, it aims at protecting proprietary hardware intellectual property (IP) blocks against reverse engineering (RE), piracy, and extraction of design secrets. A wide array of existing works on hardware obfuscation have demonstrated its security promises and theoretical robustness against diverse attacks. However, these techniques lack in (1) scalability to large commercial-scale designs, (2) ease of integration with existing electronic design automation (EDA) tool flow, (3) ability to protect against emergent attack modes, such as structural analysis-based attacks, and (4) ability to efficiently trade-off security with design overhead. The latter requires an effective metric to quantify robustness against RE attacks. In this paper, we introduce a practical state space obfuscation algorithm and associated automation tool, ProtectIP, that address the above shortcomings. The algorithmic steps have polynomial complexity and are scalable for large designs. We have developed a complete EDA tool flow that integrates ProtectIP. We show exponential resistance can be achieved against all known RE attacks while incurring modest area overhead (24% on average) with negligible impact (maximum 5% overhead) on critical-path delay. We quantify the level of achieved security using metrics and show that an intelligent attacker with partial knowledge of the obfuscation process has a low probability (maximum 0:33) of succeeding in RE attacks.