The feasibility study of deep learning (DL) approaches for reliable, flexible, and high throughput wireless physical layer (PHY) has received significant interest from academia and industry. Channel estimation (CE) is one of the critical signal processing units of the receiver PHY. Recent DLbased CE approaches have outperformed state-of-the-art statistical approaches such as least-square-based CE (LS) and linear minimum mean square error-based CE (LMMSE), requiring hardware-friendly arithmetic computations than LMMSE. The first contribution is optimizing the existing state-of-the-art CE algorithms for realization on system-on-chip (SoC) via hardwaresoftware co-design and fixed point analysis, followed by performance comparison for various signal-to-noise ratios (SNR) and wireless channels. We highlight the high complexity, execution time, and power consumption of existing DL-based CE and LMMSE approaches, along with the poor performance of the LS. We develop a novel compute-efficient LS-augmented interpolated deep neural network (LSiDNN) based CE algorithm and realize it on SoC. We demonstrate substantial savings in complexity and execution time without significant degradation in functional accuracy. Specifically, the proposed LSiDNN approach offers 88-90% lower execution time and 38-85% lower resources than state-of-the-art DL-based CE. LSiDNN significantly outperforms LMMSE, and the gain improves with increased mobility. It also offers 75% lower execution time and 90-94% lower resource utilization than LMMSE

With the introduction of spectrum sharing and het-erogeneous services in next-generation networks, the base stations need to sense the wideband spectrum and identify the spectrum resources to meet the quality-of-service, bandwidth, and latency constraints. Sub-Nyquist sampling (SNS) enables digitization for sparse wideband spectrum without needing Nyquist speed analog-to-digital converters. However, SNS demands additional signal processing algorithms for spectrum reconstruction, such as the well-known orthogonal matching pursuit (OMP) algorithm. OMP is also widely used in other compressed sensing applications. The first contribution of this work is efficiently mapping the OMP algorithm on the Zynq system-on-chip (ZSoC) consisting of an ARM processor and FPGA. Experimental analysis shows a significant degradation in OMP performance for sparse spectrum. Also, OMP needs prior knowledge of spectrum sparsity. We address these challenges via deep-learning-based architectures and efficiently map them on the ZSoC platform as second contribution. Via hardware-software co-design, different versions of the proposed architecture obtained by partitioning between software (ARM processor) and hardware (FPGA) are considered. The resource, power, and execution time comparisons for given memory constraints and a wide range of word lengths are presented for these architectures.