We propose a technique that assists conversion from a loaded reference layout of an analog circuit to a template-based generator. In order to efficiently convert a complex analog layout into its generator, generators that are already available must be reused to generate as many sub-cells as possible. If there are many sub-cells and many available generators, it is quite timeconsuming to examine which generators can generate which subcells. The proposed convolutional neural network (CNN) model automatically detects sub-cells that can be generated by available generator templates in the library, and suggests using them in the hierarchically correct places of the generator software. Upon the designer's approval, the sub-cell generator template codes are automatically inserted by function call as suggested. In an experiment, the CNN model examined sub-cells of a high-speed wireline receiver that has total of 4,885 sub-cells among which 145 sub-cells are unique. The CNN model classified the 145 unique sub-cells into 52 classes of generation possibilities utilizing available layout generators, including one not-generatable class. The CNN model achieved 99.3% precision in examining the 145 unique sub-cells. In an experiment, the examination time was greatly reduced to 15.3 seconds by the CNN model from 88 minutes of manual examination even when there were only 52 classes of generation possibilities. The time improvement would be much greater if there were many more available generators and thus many more classes of generation possibilities.

We propose a visual programming framework that helps a designer easily convert an existing analog layout into the layout generator. Using a graphical user interface (GUI), designers can easily load an existing layout, convert it into the layout generator, and visually verify the generated layout result. A GUI-supported visual programming method enables intuitive and straightforward programming to significantly reduce the required programming skills and coding workload. Through program blocks, designers can easily describe and compile a layout generator. Layout-code synchronization updates the program blocks automatically when layout elements are created, edited, or deleted via GUI. Expression assistance semi-automatically completes parameterized expressions of layout geometry through simple GUI manipulation. These methods greatly reduce the time and workload for development of the analog layout generator. Using the framework, a complex 20 Gb/s high-speed receiver was converted to the generator in 20 hours, which is just 45% of the time required for manual coding of the layout generator. Other high-speed analog blocks including DCDL, and DCC circuits were also converted to generators. The generators created hundreds of different layout designs, all of them passed design rule verification. The generated layouts achieved almost the same performance in post-layout simulation as the reference layouts.