The primary focus of Research VLSI Technology is to optimize power and Delay, so that a low power and High Speed Designs are obtained. The MTCMOS is one of the Such Promising CMOS Chip technology that uses transistors with multiple threshold voltages to optimize power and Delay. Subthreshold Leakage has brought down and achieved power optimization. In this article Multi threshold CMOS based Data Flip-Flop is Designed, analyzed and Validated on 90 nm Technology Node Using EDA Tools.