Technology CAD (TCAD) tools are pivotal for transistor modeling, providing high-accuracy, physics-based simulations essential for the development of next-generation technology nodes. Nevertheless, their high computational cost and low throughput significantly impede large-scale design-space exploration. Addressing these limitations by accelerating TCAD processes is a critical research goal. One promising approach involves using graph-based representations of TCAD meshes fed into graph neural networks (GNNs), which offer rapid and accurate alternatives. However, traditional GNN solutions, such as Graph Convolutional Networks (GCNs) and Graph Attention Networks (GATs), often falter with noisy graphs like transistor meshes, where embeddings become cluttered and complex. To overcome these challenges, we introduce the first selfsupervised GNN model for TCAD device modeling, specifically employing the Self-Supervised GAT (SuperGAT). We demonstrate that self-supervised GNN models can, in contrast to GCNs and GATs, declutter noisy graphs by performing self-supervised edge prediction tasks to differentiate between informative and redundant connections. Our evaluation compares various GNNbased aggregation layers and demonstrates that the proposed SuperGAT model successfully reproduces fundamental transistor transfer characteristics (Id-Vg) curves, sub-threshold swing (SS), and threshold voltage (Vth). We generated our dataset using 14nm FDSOI [1] transistors, which were validated against industrial measurements. Our SuperGAT model achieves a minimum R 2 score of 0.992 across all transistor characteristics and an inference time of only 0.007 sec per transistor compared to TCAD simulation time of 13 min per transistor. Resulting in a speedup of more than 100 000 x, highlighting its potential to revolutionize TCAD transistor simulations in advanced technology development. This holds especially true for performing reliability and variability analysis for transistors, where expensive Monte-Carlo simulations are inevitable.