Segmentation of IC images in integrated circuit reverse engineering
using EfficientNet encoder based on U-Net++ architecture
Abstract
The chip industry is essential for national security and economic
development, with integrated circuit (IC) reverse engineering playing a
vital role in analyzing chip structures. This process involves several
steps, including layer-by-layer image acquisition using scanning
electron microscopy (SEM), device identification, gate net extraction,
and function inference. Segmenting electrical components and metal lines
from IC images is crucial for these analyses. However, traditional image
segmentation methods often fail to handle the complex and variable
conditions of IC images due to insufficient expert knowledge. This study
introduces an improved approach, using the UNet ++ architecture and
effentnet-b7 as the encoder, called the E- UNet++ model. A
post-processing denoising stage is added that contains Hough circle
detection and median filtering for extracting metal lines and
perforations in IC images. The primary contributions of this method are:
(1) it enables fully automatic detection of metal lines and vias without
manual intervention, and (2) it combines E-UNet++, Hough circle
detection, and median filtering in a hybrid approach to accurately
locate metal lines and vias. Experimental results on over ten thousand
IC images, each measuring 1024×1024 and provided by a company, show that
training with just 393 images allows the E-UNet++ model to effectively
segment metal lines and vias. The average intersection over union (mIoU)
is 98.09% and the mean pixel accuracy (MPA) is 99.06%, surpassing the
performance of existing methods.