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A low-power and area-efficient ultrasound receiver using beamforming SAR ADC with CDAC combined delay cell structure for 3-D imaging systems
  • Seungah Lee,
  • Soohyun Yun,
  • Joonsung Bae
Seungah Lee
Kangwon National University
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Soohyun Yun
Kangwon National University
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Joonsung Bae
Kangwon National University
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Abstract

We present a low-power area-efficient subarray beamforming receiver (RX) structure for a miniaturized 3-D ultrasound imaging system. Given that the delay-and-sum (DAS) and digitization functions consume most of the area and power in the receiver, the beamforming successive approximation register (SAR) analog-to-digital converter (ADC) shares its capacitive digital-to-analog converter (CDAC) with the delay cells. As a result, the delay cells implemented with capacitors are embedded in the CDAC with significant area reduction, further eliminating the need for power-hungry ADC buffers. Furthermore, the dual reference 10-bit SAR ADC reduces the area of CDAC by 32 times, achieving a switching energy reduction of 98.3%, compared to the conventional SAR ADC. As a result, the proposed beamforming SAR ADC, simulated using a 0.18 μm CMOS process, consumes 230 μW per channel, significantly reducing the per channel capacitance.
03 Aug 2022Submitted to Electronics Letters
03 Aug 2022Submission Checks Completed
03 Aug 2022Assigned to Editor
06 Aug 2022Reviewer(s) Assigned
16 Aug 2022Review(s) Completed, Editorial Evaluation Pending
19 Aug 2022Editorial Decision: Revise Minor
31 Aug 20221st Revision Received
31 Aug 2022Submission Checks Completed
31 Aug 2022Assigned to Editor
31 Aug 2022Review(s) Completed, Editorial Evaluation Pending
01 Sep 2022Editorial Decision: Accept