Although MLIs provide better performance than traditional two-level inverters due to reduced harmonic distortion, reduced electromagnetic interference, and increased AC output voltage with lower voltages, they have a shortcoming such as increased number of sources. This paper proposes a new topology combination using High Frequency Link (HFL) with Switched Rectifier (SR) that compensates for the mentioned shortcoming. Thanks to this diversity, Cascaded H-Bridge (CHB) MLI, which produces 27 levels with 16 switches, is configured with SR and the output level is increased to 33. The proposed topology, which can produce outputs with varying frequency and amplitude, is confirmed using the Genesys-2 FPGA development board in both simulation and experimentation. The Nearest Level Control method, which targets low switching frequency, is used to minimize energy losses and reduce total harmonic distortion. Total standing voltage (TSV), cost factor per level, and efficiency calculations are performed in order to assess the proposed inverter’s economic feasibility. These results are then compared with those of many studies that use HFL in terms of component count, TSV, cost factor and it is noted that the results are like counterpart MLI topologies. Although TSV and cost factor per level are similar, the increase from 27 levels to 33 levels with 1 switch is seen as a significant increase.

Multilevel inverters (MLIs) have attracted the attention of researchers for their needs in industrial applications, renewable energy systems, and electric vehicles. MLIs require a large number of power electronic components to synthesize higher levels at the output voltage. However, overuse of power electronic devices increases the complexity, losses, and cost of MLIs. In this study, a new MLI has been proposed with a reduced number of power switches. The basic unit of the proposed MLI comprises only three independent DC sources and ten switches (eight unidirectional, and two bidirectional) to produce 21 levels at the output voltage waveform. The nearest level control (NLC) modulation method has been used to produce gate pulses. Furthermore, three extension topologies have been proposed to generate a higher number of levels and the extension parameters have been compared with recently introduced and conventional topologies. The comparative study shows that the proposed MLI topology requires fewer components in terms of power electronics parameters than the others. On the other hand, the presented first extension study can be used for all non-extendable basic units is one of the prominent values of the study. Simulation studies showing modulation methods, switching patterns, and signal outputs were performed with Matlab/Simulink. A prototype of the proposed main module has been realized and tested in the laboratory with an FPGA processing board. Experimental results have been verified with simulation results, and the performance of the proposed topology has been proven.