This paper presents a step-up DC-DC converter that uses a stepwise gate-drive technique to reduce the power FET gate-drive energy by 82%, allowing positive efficiency down to an input voltage of ±0.5 mV—the lowest input voltage ever achieved for a DC-DC converter as far as we know. Below ±0.5 mV the converter automatically hibernates, reducing quiescent power consumption to just 255 pW. The converter has an efficiency of 63% at ±1 mV and 84% at ±6 mV. The input impedance is programmable from 1 Ω to 600 Ω to achieve maximum power extraction. A novel delay line circuit controls the stepwise gate-drive timing, programmable input impedance, and hibernation behavior. Bipolar input voltage is supported by using a flyback converter topology with two secondary windings. A generated power good signal enables the load when the output voltage has charged above 2.7 V and disables when the output voltage has discharged below 2.5 V. The DC-DC converter was used in a thermoelectric energy harvesting system that effectively harvests energy from small indoor temperature fluctuations of less than 1°C. Also, an analytical model with unprecedented accuracy of the stepwise gate-drive energy is presented.

This paper presents a complete closed-form analytical model for determining the per-cycle energy consumption of a stepwise adiabatic drivers used for driving a capacitive load such as a power FET gate. The model takes into account the number of steps used, the stepwise driver tank capacitance, the load capacitance, and the stepwise driver switch resistance and on-time. Model accuracy is compared to that of simulation and models from previous work.