This paper introduces a new CMOS implementation of a spiking Leaky Integrate-and-Fire (LIF) neuron. The circuit does not require any analog circuit block such as comparators or current sources thanks to the use of a ring-oscillator as an integrator and a phase delay detector as threshold logic. The circuit admits both excitatory and inhibitory input spiking signals whose pulse width does not affect the computation. Instead of powering the ring oscillators from a power supply, the input spikes charge a capacitor bank which powers the ring oscillator. The paper describes the operation of the neuron analytically for the input integration and the membrane voltage decay. Also, a circuit-level simulation in 65nm CMOS technology has been performed, achieving a power efficiency of <40fJ/spike.