This paper proposes a look-ahead, fault-tolerant and congestion-aware routing algorithm for Networks-on-Chip (NoCs). It helps in reducing the throughput degradation and increase in average delay, by properly selecting the ports at each node of the network. To avoid dead lock and live lock situations, necessary turn restrictions have been adopted, while selecting the output ports of the nodes. Performance comparison of the proposed routing algorithm has been made for the parameters like throughput degradation, average delay increase, and area. For fault free scenarios, the proposed algorithm performs at par with the state-of-the-art routing algorithms in terms of average packet latency and throughput. For faulty scenarios, with 20\% fault rate in an 8$\times$8 mesh NoC, the proposed routing algorithm improves the throughput degradation by at least 5.85$\times$, compared to benchmark routing algorithms, such as DyAD. Compared to many state-of-the-art fault-tolerant and congestion-aware routing algorithms, the proposed approach consumes less area.