A novel SiC trench MOSFET with a P-type half-wrapped shield (HW-TMOS) is proposed and analyzed by the TCAD simulator. HW-TMOS could better shield the gate oxide from the high electric field in the off-state by extending the P shield below the gate to the side wall of the trench gate. The breakdown voltage of the device can be enhanced without causing significant degradation of the output characteristics. The peak electric field value of the gate oxide decreases by 64.9% compared with the conventional SiC trench MOSFET, in addition, the breakdown voltage increases by 13.7%. Meanwhile, the capacitance of the HW-TMOS has been optimized by converting the gate-drain capacitance of the trench gate side wall into the gate-source capacitance. The Cgd of HW-TMOS is 67pF/cm2 and the high-frequency FOM of the device is 51 mΩ·nC, which is 80.1% and 36.4% better than the traditional structure. The HW-TMOS has great advantages in reducing switching power due to the low gate-drain capacitance. Overall, the performance of the new structure is significantly improved, which can meet the high requirements of modern electronics for power devices.