not-yet-known not-yet-known not-yet-known unknown A Memristor-controlled CMOS reconfigurable true time delay circuit is introduced in this paper. The delay circuit includes 3 stages of g m -C all pass filter delay elements connected in cascade, and memristor-based tuneable DC voltage sources. The memristor value variation changes the DC bias voltage inputs of the delay elements, and thus controls the delay time indirectly: The memristor resistance changes in analogue from 10kΩ to 17 kΩ , changing the tuneable DC voltage source output from 584mV to 711mV DC voltage and the delay from 269ps to 632ps. The delay circuit can work in a frequency range from 50MHz to 1.6GHz with gain ripple smaller than 3dB. The resolvable delay time step across the delay range is < 8.7ps, troughing at as low as 0.4ps. A delay circuit working in the MHz region is also designed to compare the performance with the GHz circuit, and a memristor programming circuit is built to change the resistance levels of memristors.