Nowadays, electro-thermal transport behavior analyzing is important in emerging nanoscale devices because thermal management is a critical issue in improving the device's performance and cooling strategies. In this article, a comparative study for electro-thermal performance analysis of junctionless and an inversion mode nanowire gate-all-around (GAA) field-effect transistors (FETs) is presented in advanced technology nodes by considering nonlocal effects. The junctionless device showed ~15.2% better thermal reliability and ~26.7%/37.6% better HCI/BTI lifetime compared to the inversion mode device. The transient behavior of electro-thermal reliability is also investigated for both devices; where the devices turn on for a short time within a duty cycle, the devices showed better thermal reliability and ~52.8%/68.2% HCI/BTI lifetime improvement. This study also provides strategies for thermal management in advanced node devices.

The uniaxial tensile mechanical stress (MS) is induced up to 1.4 GPa on the junctionless channel of the twin junctionless nanowire (JL-NW) gate-all-around (GAA) field-effect transistors (FETs) using a four-point bending technique. The variation of the electrical parameters is measured before and during induced MS to analyze the performance. The ON-state current, carrier mobility, threshold voltage, and subthreshold swing are directly proportional to the induced MS due to the reduced energy band gap and intervalley scattering effect. The reduced subthreshold swing shows low power consumption and better switching ability in advanced CMOS technologies. In addition, the change of drain current shows highly piezoresistive sensing ability in nanoelectromechanical sensor applications. Thus, this study demonstrates the importance of mechanical stress engineering for performance improvement in CMOS technology, piezoresistive sensing applications, and device reliability.

In this paper, a tunable piezoresistive pressure sensor is designed and developed using junctionless nanowire (JL-NW) gate-all-around (GAA) field-effect transistors (FETs) integrated into a circular diaphragm. The measured results show that the piezoresistive sensitivity is improved by ~4 times in the subthreshold (SS) regime (depletion regime) compared to the ON-state (ION) condition (partial depletion regime). This improvement is achieved by reducing the channel conductivity with a low gate bias below the threshold voltage (VTH). Piezoresistivity variability is observed to be ~20% in the SS regime and ~10% in the ION conditions due to a diameter variation of ~±4 nm in the nanowires during a single fabrication run. The symmetric thin diameter of nanowires also shows a higher gauge factor compared to the asymmetric thickness of nanowires. This variability estimation suggests that controlling fabrication process variations is crucial for developing stable sensing elements for nanoelectromechanical (NEMS) sensors in advanced technology nodes. Additionally, low-frequency noise (LFN) is measured to estimate the minimum detectable strain (MDS) and signal-to-noise ratio (SNR). These measurements indicate that the JL-NW GAA FET offers higher resolution and better performance as a sensing element compared to the inversion mode NW GAA FET in advanced technology nodes. In addition to offering better reliability and sensing resolution, it is also much easier to integrate with advanced CMOS technologies.