Nowadays, commercial off-the-shelf (COTS) processors are increasingly popular in embedded systems for their affordability and suitability in industrial use. However, technology downsizing has made them more susceptible to bit flips-unintended memory changes in CPU registers that can cause silent data corruption (SDC) by disrupting data and control flow. These errors can cause unpredictable behavior and reduce system reliability. In this study, we evaluate the resilience of an Autonomous Mobile Robot (AMR) by injecting bit flips into its Intel-based embedded computer. The experimental results revealed a notable vulnerability of the AMR to bit flips, reaching an SDC as high as 39.71%. While many existing methods for detecting and recovering from bit flips are effective, they often impose considerable resource demands and performance overhead, making them impractical for use in resource-constrained COTS processors. To tackle this issue, our research introduces a novel selective protection approach designed for AMR. Our methodology involves two phases. Initially, we analyzed the AMR's components based on their vulnerability to fault injection and their interaction with memory. We then applied the S-SWIFT-R protection technique to the most vulnerable components, gradually increasing the number of protected elements. The results show that selectively protecting critical components reduced SDC occurrences to below 3.1%, with a code size overhead of approximately 1.71X.